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A BLE scanner using the BlueNRG

This lab will focus on applying device tree modifications to a 2021.1 Xilinx Yocto image created with the Xilinx Yocto Manifest.

Utilities / Binaries / Scripts / Config files to build a rootfs for different boards

Yocto meta-layer for MaaXBoard/Mini/Nano

This lab demos the process of adding applications to a Xilinx Yocto Image.

Example project showing how to package the Xilinx logiCORE FFT IP as an SDSoC C-Callable library.

Avnet IoTConnect Client mbed C/C++ SDK

Modification of XLX aibox-reid app into face recognition

Simple project to allow developing accelerated applications on Ultra96v2 using Vitis Acceleration and PetaLinux.

Port of design modules from the ZCU106 v2019.2 VCU TRD to the UltraZED-EV Starter Kit

An example project that demonstrates how to create face detection and person detection GStreamer plugins using the Xilinx Vitis-AI-Library.

Xilinx Petalinux GStreamer Command and Pipeline Element Reference.