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An example project that demonstrates how to create face detection and person detection GStreamer plugins using the Xilinx Vitis-AI-Library.

Machine learning example for the ZCU104 with FMC Quad-Camera module from Avnet

Port of design modules from the ZCU106 v2019.2 VCU TRD to the UltraZED-EV Starter Kit

Modification of XLX aibox-reid app into face recognition

Port of design modules from the ZCU106 v2019.2 VCU TRD to the UltraZED-EV Starter Kit

Scripted build examples for generating custom ZCU106 Vitis Platforms with Overlay Support, including DPU, SOFTMAX, VVAS HLS Accelerators, etc...)

Developed with Vivado 2022.1, these behavioral simulations show how to recover native video timing from an AXI4 Video Stream and how to convert natively timed video to AXI4 Streams using catalog IP blocks including the Video Tiiming Controller, AXI4 Stream to Video Out and Video In to AXI4 Stream IP. AXI4 Stream input video is simulated using a Video Test Pattern Generator and the AXI4 Video Stream Remapper IP to show how to convert from 2 pixels per clock to 1 pixel per clock.

Test mkdocs runner

This lab will focus on applying U-Boot modifications to a 2021.1 Xilinx Yocto image created with the Xilinx Yocto Manifest.

Avnet IoTConnect Demo on STM32 Boards ST - B-L475E-IOT01A (DISCO_L475VG_IOT01A) / B-L4S5I-IOT01A

For a custom board should the PetaLinux project always be created from scratch? This gitlab will compare the pros and cons of using a BSP project verses a Template project for custom board development.